Memory Organization in Computer Architecture
The following steps describe the operation of the memory of a computer. First, the CPU generates a virtual address and checks the TLB to see if the corresponding page is in the main memory already or not.
A. If the TLB indicates that the corresponding page is in memory, then generate a physical address and check if the data is in the cache.
(i) If it is in the cache, then this is called a hit and it reads the data from the cache
(ii) If it is not in the cache, then it is called a miss, and the CPU accesses memory and moves a block of data into the cache and then reads it.
B. If the corresponding page is not in the TLB, then the CPU checks the page table.
i. If the corresponding page is in main memory, then update the TLB and repeat
from step 1.
ii. If the corresponding page is not in the main memory, then move the page from virtual memory into main memory, update the page table, update the TLB, and repeat step 1.
C. If the corresponding page is not in the page table, then the CPU moves the page from virtual memory into main memory, updates the page table, updates the TLB, and repeats from step 1.
The above figure shows the memory organization of a computer which in this example consists of:
i. Virtual memory: Virtual memory is a technique used in computing to optimize memory management by transferring data between different storage systems. It is used to store application data and instructions that are currently not needed to be processed by the CPU. Virtual memory enables a system to run applications larger than the main memory.
ii. Main memory: It is a volatile memory. The memory unit that communicates directly with the CPU is called Main Memory. The main memory is a relatively large and fast memory used to store programs and data during the processor execution.
iii. Cache memory: The clock speed of the CPU is much faster than the main memory, So, the CPU requires fast memory. Such a fast and small memory is referred to as a ‘cache memory. The Cache Memory is the intermediate Memory between the CPU and the main memory.
iv. A page table which keeps track of pages in the main memory
v. The TLB which holds a part of the page table