2 to 4 decoder truth table and logic diagram

2 to 4 decoder:

Some decoders are constructed with NAND instead of AND gates. Since a NAND gate produces the AND operation with an inverted output, it becomes more economical to generate the decoder outputs in their complement form.

2 to 4 decoder logic diagram:

2-to-4-line decoder with an enable input constructed with NAND gates is given below:

2 to 4 decoder truth table and logic diagram

2 to 4 decoder truth table:

2 to 4 decoder truth table and logic diagram

The circuit operates with complemented outputs and a complemented enable input E. The decoder is enabled when E is equal to 0. As indicated by the truth table, only one output is equal to 0 at any given time; the other three outputs are equal to 1. The output whose value is equal to 0 represents the equivalent binary number in inputs A1 and A0. The circuit is disabled when E is equal to 1, regardless of the values of the other two inputs.